![PDF] New RTD-based set/reset latch IC for high-speed mobile D-flip flops | Semantic Scholar](https://d3i71xaburhd42.cloudfront.net/a9f1b39596e7f08405b62eebe623914a1e5c78d1/2-Figure2-1.png "PDF] New RTD-based set/reset latch IC for high-speed mobile D-flip flops | Semantic Scholar")
PDF] New RTD-based set/reset latch IC for high-speed mobile D-flip flops | Semantic Scholar
US20080224748A1 - Differential latch, differential flip-flop, lsi, differential latch configuration method, and differential flip-flop configuration method - Google Patents
NB7V52M datasheet - 1.8V / 2.5V Differential D Flip-Flop w/ Reset and CML Outputs | NB7V52M.pdf by ON Semiconductor | NB7V52M documentation view on KAZUS.RU
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Operating principle of the CML-type SET/RESET latch. | Download Scientific Diagram
adding reset function to D Flip FLOP | Forum for Electronics
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Circuit configuration of the CML-type SR-latch circuit a Circuit... | Download Scientific Diagram
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Circuit configuration of the proposed NDR-based CML D flip-flop | Download Scientific Diagram
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adding reset function to D Flip FLOP | Forum for Electronics
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adding reset function to D Flip FLOP | Forum for Electronics
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Circuit configuration of the CML-type SR-latch circuit a Circuit... | Download Scientific Diagram
adding reset function to D Flip FLOP | Forum for Electronics
Schematic of standard CML master-slave D-flip flop. | Download Scientific Diagram
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Circuit configuration of the proposed NDR-based CML D flip-flop | Download Scientific Diagram
adding reset function to D Flip FLOP | Forum for Electronics
Schematic timing diagram of the proposed NDR-based CML D flip-flop | Download Scientific Diagram
Figure 1 from A 45 mW RTD/HBT MOBILE D-Flip Flop IC Operating up to 32 Gb/s | Semantic Scholar
